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| IPB80N06S2L-07 IPP80N06S2L-07 OptiMOS(R) Power-Transistor Features * N-channel Logic Level - Enhancement mode * Automotive AEC Q101 qualified * MSL1 up to 260C peak reflow * 175C operating temperature * Green package (lead free) * Ultra low Rds(on) * 100% Avalanche tested Product Summary V DS R DS(on),max (SMD version) ID 55 6.7 80 V m A PG-TO263-3-2 PG-TO220-3-1 Type IPB80N06S2L-07 IPP80N06S2L-07 Package PG-TO263-3-2 PG-TO220-3-1 Ordering Code SP0002-18867 SP0002-18831 Marking 2N06L07 2N06L07 Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current1) Symbol ID Conditions T C=25 C, V GS=10 V T C=100 C, V GS=10 V2) Pulsed drain current2) Avalanche energy, single pulse2) Gate source voltage4) Power dissipation Operating and storage temperature I D,pulse E AS V GS P tot T j, T stg T C=25 C T C=25 C I D= 80 A Value 80 80 320 450 20 210 -55 ... +175 mJ V W C Unit A Rev. 1.0 page 1 2005-12-27 IPB80N06S2L-07 IPP80N06S2L-07 Parameter Symbol Conditions min. Thermal characteristics2) Thermal resistance, junction - case Thermal resistance, junction ambient, leaded SMD version, device on PCB R thJC R thJA R thJA minimal footprint 6 cm2 cooling area5) Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D= 1 mA V GS(th) I DSS V DS=V GS, I D=150 A V DS=55 V, V GS=0 V, T j=25 C V DS=55 V, V GS=0 V, T j=125 C2) Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=4.5 V, I D=60 A V GS=4.5 V, I D=60 A, SMD version Drain-source on-state resistance RDS(on) V GS=10 V, I D=60 A, V GS=10 V, I D=60 A, SMD version 55 1.2 1.6 0.01 2.0 1 A V 0.7 62 62 40 K/W Values typ. max. Unit - 1 1 7.1 6.8 5.6 5.3 100 100 10 9.7 7.0 6.7 m nA m Rev. 1.0 page 2 2005-12-27 IPB80N06S2L-07 IPP80N06S2L-07 Parameter Symbol Conditions min. Dynamic characteristics2) Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics2) Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage Reverse Diode Diode continous forward current2) Diode pulse current2) Diode forward voltage IS I S,pulse V SD T C=25 C V GS=0 V, I F=80 A, T j=25 C V R=30 V, I F=I S, di F/dt =100 A/s 0.9 80 320 1.3 V A Q gs Q gd Qg V plateau V DD=44 V, I D=80 A, V GS=0 to 10 V 11 32 95 3.5 14 48 130 V nC C iss C oss Crss t d(on) tr t d(off) tf V DD=30 V, V GS=10 V, I D=80 A, R G=2 V GS=0 V, V DS=25 V, f =1 MHz 3160 740 210 18 35 28 31 ns pF Values typ. max. Unit Reverse recovery time2) t rr - 59 75 ns Reverse recovery charge2) 1) Q rr - 80 100 nC Current is limited by bondwire; with an R thJC = 0.7 K/W the chip is able to carry 121 A at 25C. For detailed information see Application Note ANPS071E at www.infineon.com/optimos 2) 3) Defined by design. Not subject to production test. See diagram 13 Qualified at -20V and +20V. 4) 5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.0 page 3 2005-12-27 IPB80N06S2L-07 IPP80N06S2L-07 1 Power dissipation P tot = f(T C); V GS 4 V 2 Drain current I D = f(T C); V GS 10 V 250 100 200 80 150 60 P tot [W] 100 I D [A] 40 50 20 0 0 50 100 150 200 0 0 50 100 150 200 T C [C] T C [C] 3 Safe operating area I D = f(V DS); T C = 25 C; D = 0 parameter: t p 1000 4 Max. transient thermal impedance Z thJC = f(t p) parameter: D =t p/T 100 0.5 1 s 10 s 100 1 ms 100 s 10-1 0.1 Z thJC [K/W] I D [A] 0.05 10 10-2 0.01 single pulse 1 0.1 1 10 100 10-3 10-7 10-6 10-5 10-4 10-3 10-2 10-1 100 V DS [V] t p [s] Rev. 1.0 page 4 2005-12-27 IPB80N06S2L-07 IPP80N06S2L-07 5 Typ. output characteristics I D = f(V DS); T j = 25 C parameter: V GS 300 10 V 3V 6 Typ. drain-source on-state resistance R DS(on) = (I D); T j = 25 C parameter: V GS 16 3.5 V 250 14 12 200 4V R DS(on) [m] I D [A] 10 4V 150 8 4.5 V 100 3.5 V 6 50 3V 10 V 4 0 0 2 4 2.5 V 2 6 8 10 0 20 40 60 80 100 120 V DS [V] I D [A] 7 Typ. transfer characteristics I D = f(V GS); V DS = 6V parameter: T j 200 180 160 140 120 100 80 60 40 175 C 8 Typ. Forward transconductance g fs = f(I D); T j = 25C parameter: g fs 250 200 150 g fs [S] 100 50 25 C -55 C I D [A] 20 0 1 2 0 3 4 0 50 100 150 200 V GS [V] I D [A] Rev. 1.0 page 5 2005-12-27 IPB80N06S2L-07 IPP80N06S2L-07 9 Typ. Drain-source on-state resistance R DS(ON) = f(T j) parameter: I D = 80 A; VGS = 10 V 12 10 Typ. gate threshold voltage V GS(th) = f(T j); V GS = V DS parameter: I D 2.5 10 2 R DS(on) [m] 8 750 A V GS(th) [V] 1.5 150 A 6 1 4 0.5 2 -60 -20 20 60 100 140 180 0 -60 -20 20 60 100 140 180 T j [C] T j [C] 11 Typ. capacitances C = f(V DS); V GS = 0 V; f = 1 MHz 12 Typical forward diode characteristicis IF = f(VSD) parameter: T j 104 103 Ciss 102 C [pF] 103 Coss I F [A] 101 Crss 175 C 25 C 102 0 5 10 15 20 25 30 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 V DS [V] V SD [V] Rev. 1.0 page 6 2005-12-27 IPB80N06S2L-07 IPP80N06S2L-07 13 Typical avalanche energy E AS = f(T j) parameter: I D 800 50 A 14 Typ. gate charge V GS = f(Q gate); I D = 80 A pulsed 12 700 10 600 500 60 A 11 V 44 V 8 E AS [mJ] V GS [V] 50 100 150 200 80 A 400 300 6 4 200 2 100 0 0 0 0 20 40 60 80 100 120 T j [C] Q gate [nC] 15 Typ. drain-source breakdown voltage V BR(DSS) = f(T j); I D = 1 mA 16 Gate charge waveforms 66 64 62 60 V GS Qg V BR(DSS) [V] 58 56 54 52 50 48 46 -60 -20 20 60 100 140 180 Q gate Q gs Q gd T j [C] Rev. 1.0 page 7 2005-12-27 IPB80N06S2L-07 IPP80N06S2L-07 Published by Infineon Technologies AG St.-Martin-Strae 53 D-81541 Munchen (c) Infineon Technologies AG 2004 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices, please contact your nearest Infineon Technologies Office (www.infineon.com) Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact your nearest Infineon Technologies Office. effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 8 2005-12-27 |
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